Solid state storage devices (for example, solid state drives or SSDs) may be comprised of one or more packages of non-volatile memory dies implementing NAND memory cells, where each die is comprised of storage cells, where storage cells are organized into pages and pages are organized into blocks. Each storage cell can store one or more bits of information. A solid state storage device (SSD) of NAND memory cells uses a logical-to-physical (“L2P”) table to map logical addresses, such as logical block addresses (LBAs), to NAND physical addresses. Each entry of the L2P table is an Indirection Unit (IU). The indirection granularity is typically 4 KB, i.e., each IU maps eight 512B sectors or one 4 KB sector to a portion of a physical NAND page.
The SSD uses an internal transfer buffer, which may be implemented using Static Random Access Memory (SRAM), to transfer data between the NAND storage and the host. The SSD uses a collision bit in each L2P table entry to indicate if the corresponding IU is currently in the transfer buffer, as part of host-writes or due to internal relocations. If the collision bit indicates the data is in the transfer buffer, then the data for the corresponding IU is in the transfer buffer and will be written to NAND. The collision bit allows detection and handling of cases where the same data-range is written/relocated/read in the NAND due to overlapping requests (e.g., a host write may write to a data range that is in process of being relocated).